The combination of multiple functions on a single semiconductor chip is a growing trend in the development and manufacturing of advanced integrated circuits. For example, "Smart Power" applications involve the integration of power transistors with logic circuitry. A challenge with this approach is that the device requirements for power transistors are quite different as compared to the requirements for logic circuitry. Power transistors are relatively larger and operate at much higher voltages than transistors used in logic circuitry. In contrast, the logic devices are smaller and more densely packed. Hence, a semiconductor process allowing fabrication of both logic and power devices on the same integrated circuit is necessary. For example, the process needs to allow fabrication of different electrical isolation structures on the same chip.
Local oxidation of silicon (LOCOS) is the most commonly used isolation technology for silicon integrated circuits. In a standard LOCOS process, a thin layer of pad oxide is thermally grown on the surface of a silicon wafer. A silicon nitride layer is then deposited onto the pad oxide layer. The silicon nitride layer is then photolithographically patterned and etched to define active regions and isolation regions. Field oxide is then grown in the isolation regions, while the active regions, which are masked by the patterned silicon nitride layer, are protected from the oxidation process.
Various other modified LOCOS processes have also been proposed to fabricate electrical isolation structures. One approach uses a conformal layer of polysilicon to fill a cavity created by undercutting pad oxide layer lying underneath the silicon nitride oxidation mask. A second approach fills the cavity with a conformal layer of silicon nitride, which is then anisotropically etched to form a sidewall spacer adjacent to the silicon nitride filled cavity.
The limitation of all LOCOS-based processes is that only one field oxide thickness can be fabricated across the integrated circuit during a single field oxidation cycle. However, integration of multiple functions on the same semiconductor device requires an isolation process for creating different field oxide thicknesses, which is typically achieved with at least two field oxidation cycles. A process which requires multiple field oxidation cycles is more costly due to added steps and longer processing time.